Students, Below is a list of selected & approved papers for use as topics in the ECE5970 Fall 2002 Seminar course. You are welcome to lead the seminar on any of the papers below, but common courtesy suggests that you check with the student who suggested the paper before preparing a seminar on any paper other than your own. Again, the sooner you volunteer for a seminar date, the more likely you will get a date which matches your schedule and less likely you will be chosen for an unpleasant date. Best wishes. Brian. --- Xin --- 1. SONET: Now it’s the Standard Optical Network. By: Ralph Ballart and You-Chou Ching IEEE Communications magazine (May 2002) Call No. TK5101. A1. I13 3. Wireless-Networked Robots By: Wei Ye … 4. Embedding robots into the Internet By:Gaurav S. Sukhatme and Maja J. Matari´c 6. Visual Motion Planning For Mobile Robots By: H. Zhang, J.P. Ostrowski IEEE Transactions on Robotics and Automation (Apl. 2002) Call No. TJ211. A1. I4 7. Control of Cooperating Mobile Manipulators By: T.G. Sugar, V.Kumar I IEEE Transactions on Robotics and Automation (Feb. 2002) Call No. TJ211. A1. I4 --- Xiangqian Yu --- [1] Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik. Efficient Online and Offline Testing of Embedded DRAMs. IEEE Transactions on Computers. July 2002 (Vol. 51, No. 7), pp. 801-809 [5] Chi-Keung Luk, Todd C. Mowry. Architectural and compiler support for effective instruction prefetching: a cooperative approach. ACM Transactions on Computer Systems (TOCS). Volume 19 , Issue 1 (February 2001), pp. 71 - 109 --- Jun Shao --- [1] J.B. Carter, W.C. Hsieh, L.B. Stoller, M.R. Swanson, L. Zhang, E.L. Brunvand, A. Davis, C.-C. Kuo, R. Kuramkote, M.A. Parker, L. Schaelicke, and T. Tateyama. "Impulse: Building a Smarter Memory Controller" In the Proceedings of the Fifth International Symposium on High Performance Computer Architecture (HPCA-5), pp. 70-79, January 1999. [2] D. Patterson, T. Anderson, N. Cardwell, R. Fromm, K. Keeton, C. Kozyrakis, R. Thomas, and K. Yelick. "A Case for Intelligent DRAM: IRAM" In IEEE Micro, Vol. 17, No. 2, pp. 34-44, April 1997. [3] Mendel Rosenblum, Stephen A. Herrod, Emmett Witchel, and Anoop Gupta. "Complete Computer Simulation: The SimOS Approach" In IEEE Parallel and Distributed Technology, Vol. 3, No. 4, pp. 34-43, Winter 1995. [4] C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve. "RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors" IEEE Computer, vol. 35, no. 2, pp.40-49, special issue on high performance simulators, February 2002. --- Ying Zheng --- 2.Jamison D. Collins, Dean M. Tullsen . Runtime identification of cache conflict misses: The adaptive miss buffer. ACM Transactions on Computer Systems, Volume 19 , Issue 4, Pages: 413 - 439, Nov 2001. 3. Chi-Keung Luk, Todd C. Mowry. Architectural and compiler support for effective instruction prefetching: a cooperative approach .ACM Transactions on Computer Systems, Volume 19, Issue 1, Pages: 71 - 109, Feb 2001. 4. Seraji, H.; Howard, A. Behavior-based robot navigation on challenging terrain: A fuzzy logic approach. Robotics and Automation, IEEE Transactions on , Volume: 18, Issue: 3 , Page(s): 308 -321, June 2002. 5. Libman, L.; Orda, A. Optimal retrial and timeout strategies for accessing network resources. Networking, IEEE/ACM Transactions on, Volume: 10, Issue: 4, Page(s): 551 -564, Aug. 2002. --- Rahul Bandaru --- 1) Eric Sprangle and Doug Carmen, "Increasing Processor Perfomance by Implementing Deeper Pipelines", proceedings of the 29th Annual International symposium on Computer Architecure, May 2002. 2) Gokul B. Kandiraju and Anand Sivasubramaniam, "Going the Distance for TLB Prefetching: An Application-driven Study", proceedings of the 29th Annual International symposium on Computer Architecure, May 2002. 3) Frank Wang, "A Modified Architecture for High Density MRAM", Publication of the Association for computing Machinery, March 2001. --- Rade Trimceski --- 1. Ongoing work on Ad-hoc networking and scatternet formation algorithms utilizing Bluetooth technology. Included is the final paper from the CSIDC2002 competition. Matt Merry, Joe Nievelt, Rade Trimceski, "Examination of Bluetooth Scatternet Formation for an Instant Messenger Application", CSIDC 2002, 31 May, 2002 2.Trevor Mudge et. al., "Drowsy Caches: Simple Techniques for Reducing Leakage Power", ISCA2002 3.Todd Austin et. al., "MASE: A Novel Infrastructure for Detailed Microarchitectural Modeling", ISPASS, 2001 4. Dean M. Tullsen et. al.,"Simultaneous Multithreading: Maximizing On-Chip Parallelism", ISCA1995 --- leli@mtu.edu --- Author(s): Ehandarkar, S.M. ; Arabnia, H.R. Affiliation: Dept. of Comput. Sci., Georgia Univ., Athens, GA, USA Title: Parallel computer vision on a reconfigurable multiprocessor network Source: IEEE Transactions on Parallel and Distributed Systems 8, no. 3, (March 1997) : 292-309 Author(s): Jeschke, Hartwig ; Gaedke, Klaus ; Pirsch, Peter. Title: Multiprocessor performance for real-time processing of video coding applications Source: IEEE Transaction on Circuits and Systems for Video Technology, V2, n 2, Jun 1992, p221-230