Professor Shiyan Hu received his Ph.D. in Computer Engineering from Texas A&M University in 2008. He is currently an Associate Professor in the Department of Electrical and Computer Engineering at Michigan Technological University, where he is Director of the Michigan Tech Cyber-Physical System Research Group, Co-Director of Michigan Tech Institute of Computing and Cybersystems (forthcoming), and Director of the Michigan Tech VLSI CAD Research Lab. He has been a Visiting Professor at IBM Research (Austin) during Summer 2010, and he will be a Visiting Associate Professor at Stanford University from 08/2015 to 01/2016. His research interests include Computer-Aided Design of VLSI Circuits, Embedded Systems, Cyber-Physical Systems and Smart Home Cybersecurity, where he has published over 80 refereed papers (including 30+ in journals). He is a recipient of ACM SIGDA Richard Newton DAC Scholarship (as the faculty advisor), a recipient of Faculty Invitation Fellowship from Japan Society for the Promotion of Science (JSPS), and a recipient of the National Science Foundation (NSF) CAREER Award. His papers have been nominated for IEEE/ACM ICCAD William J. McCalla Best Paper Award in 2009 and IBM Pat Goldberg Best Paper Award in 2008 and 2010.
Prof. Hu is an Associate Editor/Guest Editor for 5 IEEE/ACM Transactions including IEEE Transactions on Circuits and Systems, IEEE Transactions on Computers, IEEE Transactions on CAD, IEEE Transactions on Industrial Informatics and ACM Transactions on Embedded Computing Systems. He has served as General Chair, Technical Program Committee (TPC) Chair, TPC Subcommittee Chair, Session Chair, and TPC Member for various conferences for more than 70 times, which include the TPC Subcommittee Chair for the premier conferences IEEE/ACM Design Automation Conference (DAC) in 2014 and 2015, and IEEE/ACM International Conference on Computer Aided Design (ICCAD) in 2011. He is a Senior Member of IEEE.
Prof. Hu¨s research has been highlighted in various public media such as CBS, IEEE Spectrum, Communications of ACM, Science Daily, PC World, Daily News and Biotech Daily. His ultra fast slew buffering technique has been widely deployed in industry. As an example, it became a default option in the IBM physical design flow used for designing over 50 microprocessors and ASIC chips including IBM flagship chips POWER 7 and 8. His work on timing driven minimum cost buffer insertion develops the first fully polynomial time approximation scheme running in O(m2n2b/ε3+n3b2/ε) time, settling a major open problem in the field (paper, slides). His microfluidic biochip physical design research was featured in the Front Cover of the premier IEEE Transactions on Nanobioscience in March 2014. He was among 62 researchers invited from the European Union and the United States to attend the EU-US Frontiers of Engineering Symposium of National Academy of Engineering in 2014. He has been advising 8 Ph.D. students (including 3 graduated) who have interned at major companies such as IBM, Synopsys, Amazon, EBay and Broadcom.
， Research Topics
， Computer-Aided Design for VLSI/Nano/Bio Circuits
， CAD for Carbon Nanotube Circuits and Microfluidic Biochips
， Nanometer Interconnect Optimizations
， Physical Design for Power/Variation/Reliability Optimizations
， Cyber-Physical System
， Smart Home System
， Smart Home Cybersecurity
Highly motivated students are sought. Please send me your resume if interested.