BCD to Seven-Segment Decoder

The purpose of this lab experience is for the student to design and implement combinatorial logic that will decode a 4-bit BCD input  to a seven segment LED display.  The combinatorial circuit will be implemented on a programmable logic device and interfaced to a common-annode 7-segment LED display. 

Equipment required:

Digital Logic Stimulator, EP610DC-25, 220 resistor bank, breadboard, common-annode 7-segment LED display.

Background Information

You are likely familiar - very familiar - with the idea of a seven-segment indicator for representing decimal numbers. Each segment of a seven-segment display is a small light-emitting diode (LED) or liquid-crystal display (LCD), and - as is shown below - a decimal number is indicated by lighting a particular combination of the LED's or LCD's elements:

Figure 1. Seven Segment Display Format

Bindary-coded-decimal (BCD) is a common way of encoding decimal numbers with 4 binary bits as shown below:

Decimal digit
0
1
2
3
4
BCD code
0000
0001
0010
0011
0100

Decimal digit
5
6
7
8
9
BCD code
0101
0110
0111
1000
1001
Table 1. Binary Coded Decimal Code

Your job for this lab is to design and test a circuit to convert a 4-bit BCD signal into a 7-bit control signal according to the following figure and table:

Figure 2. Control Logic map

Figure 3. DSP-1 Pin out

 

Truth Table for BCD to 7 segment decoder
b3 b2 b1 b0
a b c d e f g
0 0 0 0
0 0 0 0 0 0 1
0 0 0 1
1 0 0 1 1 1 1
0 0 1 0
0 0 1 0 0 1 0
0 0 1 1
0 0 0 0 1 1 0
0 1 0 0
1 0 0 1 1 0 0
0 1 0 1
0 1 0 0 1 0 0
0 1 1 0
0 1 0 0 0 0 0
0 1 1 1
0 0 0 1 1 1 1
1 0 0 0
0 0 0 0 0 0 0

1 0 0 1

0 0 0 0 1 0 0

1 0 1  0

0110000

1 0 1  1

0110000

1 1 0 0 0110000
1 1 0 1 0110000
1 1 1 0 0110000
1 1 1 1 0110000
Figure 4. BCD -7 Segment Display Truth Table

 

 

Notice that the truth-table corresponds to a seven-segment device whose display elements are active low. That is, each element will be active when its corresponding input is '0'.  This is necessary because we are using displays with a COMMON ANODE

Before beginning this laboratory, you should read the brief overview of BCD to seven-segment convertors that is found in Section 6.4 of the text Fundamentals of Digital Logic with VHDL Design. You will also benefit greatly from reviewing the digital-circuit synthesis techniques that you have been studying in Chapter 4. In particular, review the methods for minimization of sum-of-products forms found in Section 4.2.

Pre-Laboratory Assignment
For this introductory lab assignment, you will design a BCD to seven-segment code convertor. Use the minimal sum-of-products method to derive the logic for each decoder output (a, b, c, d, e, f, g). Note that because you will be using a common anode display, individual segments are ASSERTED LOW.  That is to say that an individual LED segment will light up when you provide it with a "logic 0."  Use this handy-dandy template for Karnaugh maps. Before you begin entering your schematic into the MAX+plusII CAD system, your instructor should initial your Instructor Verification Sheet. You will need to include the initialed sheet with your lab report.

Lab Activity

Enter the schematic for your circuit into the MAX+plusII CAD system, then simulate your circuit to verify that it works. Your waveform simulation should test all 16 binary number codes.  Note that there are some binary combinations that are excluded from the Binary Coded Decimal format.  These input states should not appear on the single digit display available.

Hint: When entering a circuit schematic in sum-of-products or product-of-sums form, you may find it convenient to form a 'bus' of all inputs and their complements. For sum-of-products you would then have a layer of and-gates followed by a layer of or-gates. Likewise, for product-of-sums, you would have a layer of or-gates followed by a layer of and-gates. As an example, consider the 3-input, 2-output circuit with the following product-of-sums description:

a = (b1 + ~b2)(~b0 + ~b1 + b2)
b=(b0 + b1)(~b1 + b2)(~b0 + ~b2)

A convenient way to enter this schematic is shown below. Keep in mind that your design will be different in that you will likely implement a circuit in sum-of-products form.

 

Figure 5. Output Timing display

 

You derived logic expressions and the corresponding schematic. And you likely found this to be a tedious - but rewarding - task. Now you will program an Programmable Logic Device (PLD) and interface your control logic to a set of debounced switches and a seven segment display on your breadboard.

Programming the Device
Begin by opening your project. Mine is called 'bcd_to_seven_segment'. Associated with this project - if its name is 'bcd_to_seven_segment' - should be the following files:

bcd_to_seven_segment.gdf (schematic file)
bcd_to_seven_segment.snf (simulator netlist file)
bcd_to_seven_segment.scf (waveform editor file)

Open the schematic file (.gdf). Last time you compiled this circuit using the functional SNF extractor. This time you will use the timing SNF extractor. But first you must select the device. To do this, select Assign | Device to bring up the Device window. Select 'CLASSIC' as the Device Family. Unselect - if needed - the Show Only Fastest Speed Grades box. Then select 'EP610DC-25' as the Device.

Now select MAX+plusII | Compiler. You will likely see the following window:

which corresponds to the functional SNF extractor. Now we need the timing SNF extractor. To get it, select Processing and you should see a check next to functional SNF extractor. Click to deselect and get the timing SNF extractor. You should now see the following window:

Select 'Start' and you should obtain a successful compilation. One result of the compilation will be a .rpt file. Open this file to learn about your circuit. Within this file you will find the pin assignments for your device:

You will likely have these same pin assignments. If you do not, your TA will help you force the compiler to produce these assignments. Get help if needed.

You can learn other information about your circuit by examining this file. Save all files to a floppy disk and move to the programming station. Ask your TA to supply you with a device and help you place the device into the programmer. Start the MAX+plusII software at this station, then open your project. Select MAX+plusII | Programmer to see the Programmer window. Select Blank-Check to verify that your device has been erased, then select Program. Select Verify to be sure everything worked. Now your chip has been programmed, and the .rpt file will tell you the pin allocations. You are ready to test your circuit.

Your station will have a fixture that is equipped with a regulated 5V power supply and debounced toggle switches.  Use this fixture to provide the BCD inputs to your controller.  Then connect the outputs of your controller, through a current limiting resistor, to the cathode of the individual segments of the display.

Laboratory Report
Your laboratory report should illustrate your circuit design and document the testing you performed to verify its function. Your simulation should produce a waveform file similar to the one shown below.

After you have verified that your circuit works, have your instructor initial your Instructor Verification Sheet.

 


Copyright © 2000
Department of Electrical and Computer Engineering
Michigan Technological University
Last updated 2/15/01
Timothy J. Schulz