Zhuo Feng

Assistant Professor
Department of Electrical and Computer Engineering

Michigan Technological University

EERC 730

Contact: (906) 487-3116
Email: zhuofeng at mtu dot edu

VLSI Design Automation Group

 

Biography | Research | Honors | Publications | Teaching | Services | Opportunities

 

Biography

I received the Ph.D. degree in Electrical and Computer Engineering from Texas A&M University, College Station, TX in 2009, the M.Eng. degree in Electrical Engineering from National University of Singapore, Singapore, in 2005 and the B.Eng. degree in Information Engineering from Xi’an Jiaotong University, Xi’an, China, in 2003. As of July 2009, I have been an assistant professor at the Department of Electrical and Computer Engineering, Michigan Technological University, Houghton, MI, where I am affiliated with the Computer Engineering Group. My research interests include hardware (e.g. Graphics Processing Unit) acceleration of circuit simulations, die-package power delivery network (PDN) modeling and simulation for multi-core processor design, variation-aware VLSI circuit modeling/optimization and statistical static timing analysis. I spent summers at Mentor Graphics Inc, Wilsonville, OR, and Magma Design Automation, Austin, TX, in 2007 and 2008 respectively, working on a statistical design-dependent interconnect corner extraction program,  and the hardware acceleration of circuit simulations.

 

Research  

 

Honors

 

Publications

                  

Note: Supervised students are delineated with an asterisk (*).

 

 

Book Chapters 

 

[B1] Rasit Onur Topaloglu, Zhuo Feng and Peng Li, “Interconnect variability and performance analysis,” 18 pages, in Recent Advancements in Modeling of Semiconductor Processes, Circuits and Chip-Level Interactions (editor: Rasit Onur Topaloglu, co-editor: Peng Li), Bentham Publishing (www.ebook-engineering.org) 2009 (in progress).

 

 Journal Articles 

  

[J8][TCAD10] Zhiyu Zeng, Zhuo Feng and Peng Li, “Transient Verification of Gated Power Delivery Networks for Multi-Core Designs,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, under revision.

 

[J7] [TVLSI10] Zhuo Feng, Zhiyu Zeng and Peng Li, “Parallel On-Chip Power Distribution Network Analysis on Multi-Core-Multi-GPU Platforms,” IEEE Trans. on Very Large Scale Integration Systems, under minor revision.

 

[J6] [IET09] Zhuo Feng, Peng Li and Zhuoxiang Ren,  “SICE: design-dependent statistical interconnect corner extraction under inter/intra-die variations,” IET Circuits, Devices & Systems, vol.3, no.5, pp. 248-258, Oct. 2009.

 

[J5] [TCAD09] Zhuo Feng, Yaping Zhan and Peng Li, “An On-the-Fly Parameter Dimension Reduction Approach to Fast Second-Order Statistical Static Timing Analysis,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol.28,  no.1,  pp.141-153, Jan. 2009.

 

[J4] [TVLSI09] Ganesh Venkataraman, Zhuo Feng, Jiang Hu, Peng Li, “Combinatorial algorithms for fast clock mesh optimization”, in IEEE Trans. on Very Large Scale Integration Systems, to appear.

 

[J3] [TVLSI09] Zhuo Feng and Peng Li, “Performance-Oriented Parameter Dimension Reduction of VLSI Circuits,” in IEEE Trans. on Very Large Scale Integration Systems, vol.17, no.1, pp.137-150, Jan. 2009.

 

[J2] [TCAD08] Guo Yu, Wei Dong, Zhuo Feng and Peng Li, “Statistical Static Timing Analysis Considering Process Variation Model Uncertainty,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol.27, no.10, pp.1880-1890, Oct. 2008.

 

[J1] [TVLSI07] Peng Li, Zhuo Feng and Emrah Acar, “Characterizing multi-stage nonlinear drivers and variability for accurate timing and noise analysis,” in IEEE Trans. on Very Large Scale Integration Systems, vol.15, no.11, pp.1205-1214, Nov. 2007.   

 

 

           Conference Publications

           

[C16] [DAC10] Xueqian Zhao*, Yonghe Guo, Shiyan Hu and Zhuo Feng, “A novel cross entropy approach to on-chip decap budgeting”, accepted by IEEE/ACM Design Automation Conference, 2010 (acceptance rate 24%).

 

[C15] [DAC10] Zhiyu Zeng, Xiaoji Ye, Zhuo Feng and Peng Li, “Tradeoff Analysis and Optimization of Power Deliver Networks with On-Chip Voltage Regulation”, accepted by IEEE/ACM Design Automation Conference, 2010 (acceptance rate 24%).

 

[C14] [DAC10] Zhuo Feng, and Zhiyu Zeng, “Parallel Multigrid Preconditioning on Graphics Processing Units (GPUs) for Robust Power Grid Analysis”, accepted by IEEE/ACM Design Automation Conference, 2010 (acceptance rate 24%).

 

[C13] [TAU10] Xueqian Zhao, Yonghe Guo, Shiyan Hu and Zhuo Feng, “A novel cross entropy approach to on-chip decap budgeting”, in ACM/IEEE Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, March 2010.

 

[C12] [ISQED09] Zhiyu Zeng, Peng Li and Zhuo Feng, “Parallel partitioning based on-chip power distribution network analysis using locality acceleration,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 776-781, March 2009

 

[C11] [TECHCON08] Zhuo Feng and Peng Li, “Design-Dependent Statistical Interconnect Corner Extraction Under Inter/Intra-Die Variations”, SRC TECHCON'08.

 

[C10] [ICCAD08] Zhuo Feng and Peng Li, “Multigrid on GPU: Tackling Power Grid Analysis on Parallel SIMT Platforms”, in Proc. of IEEE/ACM Intl. Conf. on Computer-Aided Design, pp. 647-654, November 2008. (Best Paper Nomination)

 

[C9] [ICCAD07] Zhuo Feng and Peng Li, “A methodology for timing model characterization for statistical static timing analysis”, in Proc. of IEEE/ACM Intl. Conf. on Computer-Aided Design, November 2007 (acceptance rate 27.3%).


[C8] [ICCAD07] Wei Dong, Zhuo Feng and Peng Li,  “Efficient VCO phase macromodel generation considering statistical parametric variations”, in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, November 2007 (acceptance rate 27.3%).


[C7] [DAC07] Guo Yu, Wei Dong, Zhuo Feng and Peng Li, “A framework for accounting for process model uncertainty in statistical static timing analysis,” in Proc. of IEEE/ACM Design Automation Conference,  pp. 824-834, June 2007 (acceptance rate 23.2%).


[C6] [DAC07] Zhuo Feng, Peng Li and Yaping Zhan, “Fast second-order statistical static timing analysis using parameter dimension reduction,” in Proc. of IEEE/ACM Design Automation Conference, pp. 244-249, June 2007 (acceptance rate 23.2%).


[C5] [ISQED07] Zhuo Feng, Guo Yu and Peng Li, “Reducing the complexity of VLSI performance variation modeling via parameter dimension reduction”, in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 737-742, March 2007 (acceptance rate 33%).


[C4] [TAU07] Zhuo Feng and Peng Li, “Parameterized waveform-independent gate models for timing and noise analysis”, in ACM/IEEE Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pp. 61-65, February 2007 (acceptance rate 44.0%).


[C3] [ICCAD06] Zhuo Feng and Peng Li, “Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression”, in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 868-875, November 2006  (acceptance rate 25.1%). (Best Paper Nomination)


[C2] [ICCAD06] Ganesh Venkataraman, Zhuo Feng, Jiang Hu, Peng Li, “Combinatorial algorithms for fast clock mesh optimization”, in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 563-567, November 2006 (acceptance rate 25.1%).


[C1] [ISQED06] Zhuo Feng, Peng Li and Jiang Hu, “Efficient model update scheme for general link-insertion networks”, in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp.43-50, March 2006 (acceptance rate 36.3%).

 

Teaching 

EE4800 Comp. aided des. of VLSI sys. (Spring 2010)

EE5900 VLSI modeling and simulation (Fall 2009)

Services

Technical Program Committee member, IEEE International Symposium on Quality Electronic Design (ISQED), 2010 

Technical Reviewer, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 

Technical Reviewer, IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Technical Reviewer, IEEE Transactions on Circuits and Systems II 

 

Opportunities

          Students with solid electrical and computer engineering background are sought to work on research projects related to VLSI computer-aided design and large-scale modeling and simulation problems.

 

  Last updated in Jan 2010.   © Copyright by Zhuo Feng.