Michigan Technological University

 

 

                              

                   Design Automation Group

 

Publications

 

Note: Supervised students are delineated with an asterisk (*).

 

Book Chapters 

 

[B1] Rasit Onur Topaloglu, Zhuo Feng and Peng Li, “Interconnect variability and performance analysis”, 18 pages, in Recent Advancements in Modeling of Semiconductor Processes, Circuits and Chip-Level Interactions (editor: Rasit Onur Topaloglu, co-editor: Peng Li), Bentham Publishing (www.ebook-engineering.org) 2011.

 

 

Journal Articles 

 

[J15] [TCAD15] Lengfei Han*, Xueqian Zhao*, and Zhuo Feng, “An Adaptive Graph Sparsification Approach to Scalable Harmonic Balance Analysis of Strongly Nonlinear Post-layout RF Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsto appear.

[J14][TVLSI14] Zhuo Feng,”Fast RC Reduction of Flip-Chip Power Grids Using Geometric Templates”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 11, pp. 2357-2365, Nov. 2014.

[J13] [TVLSI13] Zhuo Feng, “Scalable Multilevel Vectorless Power Grid Voltage Integrity Verification”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 8, pp. 1388-1397, Aug. 2013.

[J12] [TVLSI13] Zhuo Feng,  and Peng Li, “Fast Thermal Analysis on GPU for 3D-ICs with Integrated Microchannel Cooling”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.21, no. 8, pp.1526-1539, Aug. 2013.

[J11] [IJNMBE11] Beini Jiang, Allan Struthers, Zhe Sun, Zhuo Feng, Xueqian Zhao*, Kaiyong Zhao, Weizhong Dai, Xiaobo Zhou, Michael E. Berens, and Le Zhang, “Employing graphics processing unit technology, alternating direction implicit method and domain decomposition to speed up the numerical diffusion solver for the biomedical engineering research”, International Journal for Numerical Methods in Biomedical Engineering, vol. 27, no.11, pp. 1829-1849, Nov. 2011.

[J10] [TCAD11] Xueqian Zhao*, Yonghe Guo, Xiaodao Chen, Zhuo Feng and Shiyan Hu, “Hierarchical Cross Entropy Optimization for Fast On-Chip Decap Budgeting”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsvol. 30, no.11, pp. 1610-1620, Nov. 2011.

[J9] [TCAD11] Zhuo Feng, Xueqian Zhao* and Zhiyu Zeng, “Robust Parallel Preconditioned Power Grid Simulation on GPU with Adaptive Runtime Performance Modeling and Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsvol.30,  no.4,  pp.562-573, April 2011.

[J8] [TODAES11] Zhiyu Zeng, Zhuo Feng, Peng Li, and Vevik Sarin, “Locality-Driven Parallel Static Analysis for Power Delivery Networks”, ACM Transactions on Design Automation of Electronic Systems, vol. 16, no. 3, pp. 28:1-28:17, 2011.

[J7] [TVLSI11] Zhuo Feng, Zhiyu Zeng and Peng Li, “Parallel On-Chip Power Distribution Network Analysis on Multi-Core-Multi-GPU Platforms”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.19, no.10, pp.1823-1836, Jun. 2011.

[J6] [TVLSI10] Ganesh Venkataraman, Zhuo Feng, Jiang Hu and Peng Li, “Combinatorial algorithms for fast clock mesh optimization”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.18,  no.1,  pp.131-141, Jan. 2010.

[J5] [IET09] Zhuo Feng, Peng Li and Zhuoxiang Ren, SICE: design-dependent statistical interconnect corner extraction under inter/intra-die variations”, IET Circuits, Devices & Systems, vol.3, no.5, pp. 248-258, Oct. 2009.

[J4] [TCAD09] Zhuo Feng, Yaping Zhan and Peng Li, “An On-the-Fly Parameter Dimension Reduction Approach to Fast Second-Order Statistical Static Timing Analysis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.28,  no.1,  pp.141-153, Jan. 2009.

[J3] [TVLSI09] Zhuo Feng and Peng Li, “Performance-Oriented Parameter Dimension Reduction of VLSI Circuits”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.17, no.1, pp.137-150, Jan. 2009. (The most downloaded papers of IEEE TVLSI in 2009)

[J2] [TCAD08] Guo Yu, Wei Dong, Zhuo Feng and Peng Li, “Statistical Static Timing Analysis Considering Process Variation Model Uncertainty”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.27, no.10, pp.1880-1890, Oct. 2008.

[J1] [TVLSI07] Peng Li, Zhuo Feng and Emrah Acar, “Characterizing multi-stage nonlinear drivers and variability for accurate timing and noise analysis”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.15, no.11, pp.1205-1214, Nov. 2007.   

 

Conference Publications

 

[C30] [ICCAD14] Xueqian Zhao*, and Zhuo Feng, “An Efficient Spectral Graph Sparsification Approach to Scalable Reduction of Large Flip-Chip Power Grids”, to appear in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2014 (acceptance rate: 25%).  

[C29] [ICSICT14] Zhuo Feng, Xueqian Zhao*, and Lengfei Han*, “Graph Sparsification Approaches to Scalable Integrated Circuit Modeling and Simulations”, to appear in Proceedings of IEEE 12th International Conference on Solid -State and Integrated Circuit Technology, Oct, 2014 (invited paper).

[C28] [ICCAD13] Lengfei Han*, Xueqian Zhao*, and Zhuo Feng, “An Efficient Graph Sparsification Approach to Scalable Harmonic Balance (HB) Analysis of Strongly Nonlinear RF Circuits”, to appear in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2013 (acceptance rate: 92/354 = 26%).  

[C27] [DAC13] Lengfei Han*, Xueqian Zhao* and  Zhuo Feng, “TinySPICE: A Parallel SPICE Simulator on GPU for Massively Repeated Small Circuit Simulations”, in Proceedings of ACM/IEEE Design Automation Conference (DAC),  June, 2013 (acceptance rate: 162/747 = 22%). 

[C26] [DAC13] Zhuo Feng, “Scalable Vectorless Power Grid Current Integrity Verification”, in Proceedings of ACM/IEEE Design Automation Conference (DAC),  June, 2013 (acceptance rate: 162/747 = 22%). (Best Paper Award, 1/747=0.13%)

[C25] [DATE13] Zhuo Feng, “Large-scale flip-chip power grid reduction with geometric templates”,  in Proceedings of the IEEE/ACM Design, Automation, and Test in Europe (DATE), March, 2013. (pdf file, slides)

[C24] [ICCAD12] Xueqian Zhao*, and Zhuo Feng, “GPSCP: A General-Purpose Support-Circuit Preconditioning Approach to Large-Scale SPICE-Accurate Nonlinear Circuit Simulations”,  in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2012 (acceptance rate: 82/338 = 24%) . (pdf file, slides)

[C23] [DAC12] Xueqian Zhao*, and Zhuo Feng, “Towards Efficient SPICE-Accurate Nonlinear Circuit Simulation with On-the-Fly Support-Circuit Preconditioners”, in Proceedings of ACM/IEEE Design Automation Conference (DAC),  June, 2012 (acceptance rate: 164/741= 22%). (pdf file, slides)

[C22] [ICCAD11] Xueqian Zhao*, Jia Wang, Zhuo Feng and Shiyan Hu, “Power Grid Analysis with Hierarchical Support Graphs”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 543-547, November, 2011 (acceptance rate: 106/349 = 30%).(pdf file, slides)

[C21] [ICCAD11] Zhiyu Zeng, Tong Xu, Zhuo Feng and Peng Li, “Fast static analysis of power grids: algorithms and implementations”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 488-493, November, 2011 (invited paper).

[C20] [DAC11] Xueqian Zhao*, and Zhuo Feng, “Fast Multipole Method on GPU: Tackling 3-D Capacitance Extraction on Massively Parallel SIMD Platforms”, in ACM/IEEE Design Automation Conference (DAC), pp. 558-563, June, 2011 (acceptance rate: 156/690 = 23%). (pdf file, slides)

[C19] [ISQED11] Zhiyu Zeng, Zhuo Feng and Peng Li, “Efficient checking of power delivery integrity for power gating”,  in IEEE International Symposium on Quality Electronic Design (ISQED),  pp. 663-670, March, 2011. (pdf file, slides)

[C18] [ICCAD10] Zhuo Feng and Peng Li, “Fast thermal analysis on GPU for 3D-ICs with integrated microchannel cooling”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2010 (acceptance rate: 108/360 = 30%).

[C17] [TECHCON10] Zhiyu Zeng, Xiaoji Ye, Zhuo Feng and Peng Li, “Tradeoff Analysis and Optimization of Power Deliver Networks with On-Chip Voltage Regulation”, SRC TECHCON'10, September, 2010.

[C16] [DAC10] Xueqian Zhao*, Yonghe Guo, Zhuo Feng, and Shiyan Hu, “Parallel Hierarchical Cross Entropy Optimization for On-Chip Decap Budgeting”, in Proceedings of ACM/IEEE Design Automation Conference (DAC), pp. 843-848, June, 2010 (acceptance rate: 148/607 = 24%). (pdf file, slides)

[C15] [DAC10] Zhiyu Zeng, Xiaoji Ye, Zhuo Feng and Peng Li, “Tradeoff Analysis and Optimization of Power Deliver Networks with On-Chip Voltage Regulation”, in Proceedings of ACM/IEEE Design Automation Conference (DAC), pp. 831-836, June, 2010 (acceptance rate: 148/607 = 24%). (pdf file, slides)

 

[C14] [DAC10] Zhuo Feng, and Zhiyu Zeng, “Parallel Multigrid Preconditioning on Graphics Processing Units (GPUs) for Robust Power Grid Analysis”, in Proceedings of ACM/IEEE Design Automation Conference (DAC), pp. 661-666, June, 2010 (acceptance rate: 148/607 = 24%). (pdf file, slides)

 

[C13] [TAU10] Xueqian Zhao*, Yonghe Guo, Shiyan Hu, and Zhuo Feng, “A novel cross entropy approach to on-chip decap budgeting”, in ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), March, 2010.

[C12] [ISQED09] Zhiyu Zeng, Peng Li and Zhuo Feng, “Parallel partitioning based on-chip power distribution network analysis using locality acceleration”, in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), pp. 776-781, March, 2009.

[C11] [TECHCON08] Zhuo Feng and Peng Li, “Design-Dependent Statistical Interconnect Corner Extraction Under Inter/Intra-Die Variations”, SRC TECHCON'08, September, 2008.

 

[C10] [ICCAD08] Zhuo Feng and Peng Li, “Multigrid on GPU: Tackling Power Grid Analysis on Parallel SIMT Platforms”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 647-654, November, 2008 (acceptance rate: 122/458 = 27%). (ACM/IEEE William J. McCalla ICCAD Best Paper Award Nomination, 3%).

[C9] [ICCAD07] Zhuo Feng and Peng Li, “A methodology for timing model characterization for statistical static timing analysis”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2007 (acceptance rate: 139/510 = 27%).

[C8] [ICCAD07] Wei Dong, Zhuo Feng and Peng Li,  “Efficient VCO phase macromodel generation considering statistical parametric variations”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2007 (acceptance rate: 139/510 = 27%).

[C7] [DAC07] Guo Yu, Wei Dong, Zhuo Feng and Peng Li, “A framework for accounting for process model uncertainty in statistical static timing analysis”, in Proceedings of ACM/IEEE Design Automation Conference (DAC),  pp. 824-834, June, 2007 (acceptance rate: 152/659 = 23%).

[C6] [DAC07] Zhuo Feng, Peng Li and Yaping Zhan, “Fast second-order statistical static timing analysis using parameter dimension reduction”, in Proceedings of ACM/IEEE Design Automation Conference (DAC), pp. 244-249, June, 2007 (acceptance rate: 152/659 = 23%).

[C5] [ISQED07] Zhuo Feng, Guo Yu and Peng Li, “Reducing the complexity of VLSI performance variation modeling via parameter dimension reduction”, in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), pp. 737-742, March, 2007.

[C4] [TAU07] Zhuo Feng and Peng Li, “Parameterized waveform-independent gate models for timing and noise analysis”, in ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 61-65, February, 2007.

[C3] [ICCAD06] Zhuo Feng and Peng Li, “Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression”, in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 868-875, November, 2006  (acceptance rate: 127/541 = 23%). (ACM/IEEE William J. McCalla ICCAD Best Paper Award Nomination, 3%)

[C2] [ICCAD06] Ganesh Venkataraman, Zhuo Feng, Jiang Hu, Peng Li, “Combinatorial algorithms for fast clock mesh optimization”, in Proceedings of IEEE/ACM International Conference  on Computer-Aided Design (ICCAD), pp. 563-567, November, 2006 (acceptance rate: 127/541 = 23%).

[C1] [ISQED06] Zhuo Feng, Peng Li and Jiang Hu, “Efficient model update scheme for general link-insertion networks”, in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), pp.43-50, March, 2006.

 

Poster Presentations

[P8] [ICCADAMS14] Xueqian Zhao*, Lengfei Han* and Zhuo Feng, “A Performance-Guided Graph Sparsification Approach to Scalable and Robust SPICE-Accurate Integrated Circuit Simulations”, International Workshop on Design Automation for Analog and Mixed-Signal Circuits, November, 2014.

[P7] [DACPHD14] Lengfei Han*, “An Efficient Graph Sparsification Approach to Scalable and Robust Preconditioned Harmonic Balance (HB) Analysis of Strongly Nonlinear Radio-Frequency Integrated Circuits”, DAC Ph.D. Forum, June, 2014.

[P6] [ICCADAMS13] Lengfei Han*, Xueqian Zhao* and Zhuo Feng, “Graph Sparsification Approach to Scalable Harmonic Balance Analysis of RF Circuits”, International Workshop on Design Automation for Analog and Mixed-Signal Circuits, November, 2013.

[P5] [ICCADAMS12] Xueqian Zhao* and Zhuo Feng, “GPSCP: A General-Purpose Support-Circuit Preconditioning Approach to Large-Scale SPICE-Accurate Nonlinear Circuit Simulations”, International Workshop on Design Automation for Analog and Mixed-Signal Circuits, November, 2012.

[P4] [DACPHD12] Xueqian Zhao*, “Scalable SPICE-Accurate Nonlinear Circuit Simulation with On-the-Fly Support-Circuit Preconditioners”, DAC Ph.D. Forum, June, 2012.

[P3] [DACWIP12] Lengfei Han*, Xueqian Zhao* and  Zhuo Feng, “TinySPICE: A Parallel SPICE Simulator on GPU for Massively Repeated Small Circuit Simulations”, DAC Work-In-Progress, June, 2012.

[P2] [PAPA11] Xueqian Zhao* and  Zhuo Feng, “Parallel CAD Algorithms for Energy Efficient Heterogeneous Computing Platforms”, DAC Workshop on Parallel Algorithms, Programming, and Architectures (PAPA), June, 2011.

[P1] [PAPA11] Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Tong Xu and  Peng Li, “GSim: A Fast CPU-GPU Combined Parallel Simulator for Power Delivery Networks with On-Chip Voltage Regulation”, DAC Workshop on Parallel Algorithms, Programming, and Architectures (PAPA), June, 2011.

 

Last updated in Dec. 2014.  Copyright by Zhuo Feng.